Bipolar logic circuits that provide an output determined by one or more inputs may be designed using one of several circuit techniques, i.e., transistor-transistor logic (TTL), diode-transistor logic (DTL), current mode logic (CML), and emitter-coupled logic (ECL). TTL and DTL are saturated logic circuits, while CML and ECL are non-saturated logic circuits. Consequently, CML and ECL can operate at a higher speed than TTL and DTL by eliminating minority carrier storage time as a speed limiting characteristic. CML gates are similar to ECL gates and typically comprise a pair of differentially coupled transistors having their emitters coupled to a current source. These differentially coupled transistors provide high impedance inputs at their bases, voltage gain within the gate, insignificant power supply noise generation due to the elimination of current spikes, and nearly constant power supply current drain. Emitter follower outputs for the ECL gate restores the logic level and provide low output impedance for good line driving and high fanout capability.
Gate speeds continue to increase periodically due to technological advances in processing as well as market demands for even higher performance devices. Advanced processes have provided for smaller device geometries, improved bandwidth, and reduced parasitic capacitances. However, market demands continue to require increased speed.
Thus, what is needed is an ECL gate having substantially increased speed.